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Monday, April 12, 2010

Synchronous Counter Design


 
1.Determine desired number of bits and desired counting sequence
2.Draw the state transition diagram showing all possible states
3.Use the diagram to create a table listing all PRESENT states and their NEXT states
4.Add a column for each JK input.  Indicate the level required at each J and K in order to produce transition to the NEXT state.
5.Design the logic circuits to generate levels required at each JK input.
6.Implement the final expressions.

Soklan: 
- Design a 3-bit counter that counts in the following sequence: 000, 001, 010, 011, 100 and repeat.
 ** Consider that other sequence will start at 000
 
 
 
 
 

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